FPGA Based High Speed Interpolators

Author(s):

Priyanka C. Kale , JSPM's BSIOTR, Pune

Keywords:

DSP (Digital Signal Processor), FPGA (Field Programmable Gate Array), Interpolation, Spartan 3E, SRC (Sample Rate Conversion)

Abstract:

Aim of this project is to design flexible interpolators on Field Programmable Gate Arrays. Implementation on Field Programmable Gate Arrays brings advantages that include: low cost, higher precision processing, design flexibility and low power. The modern digital systems are more complex. They consist of several Digital Signal processors that operate at different sampling frequencies. A common sample rate should be employed for all processors to mix/combine the environments digitally. This design of interpolator can ease the speed requirement of several Digital Signal Processors for many high performance digital signal applications. This design gives the flexibility to implement the different wordlength interpolators. In this design of interpolators the interpolation factor can be varied from 2 to 20. In this project, data interpolators are designed to make speed twice (x2) and four times (x4) i.e. Interpolation factors 2 and 4 are used.

Other Details:

Manuscript Id	:	IJSTEV2I1038
Published in	:	Volume : 2, Issue : 1
Publication Date	:	01/08/2015
Page(s)	:	120-123

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