Efficient Adders

Author(s):

Sanjai Kumar V.S , Saintgits College of Engineering ,Kottayam; Ajith Abraham Varghese, Saintgits College of Engineering ,Kottayam; Nimmi Scaria, Saintgits College of Engineering ,Kottayam; Ritsy Thomas, Saintgits College of Engineering ,Kottayam; Abraham K. Thomas, Saintgits College of Engineering ,Kottayam

Keywords:

BEC, CSLA, RCA

Abstract:

Half adders are used to add two one bit numbers. In order to add two one bit numbers with the carry generated in previous order addition, we use full adders. For adding multiple bit wide numbers, we cascade full adders to form Ripple Carry Adders (RCA). RCA is one of the area efficient adder, but it is not much faster because of the carry propagation delay. Carry Select Adders (CSLA) use two RCA blocks, one generates partial sum by assuming carry-in as zero and the other assumes carry-in as one. The original sum output is selected by using multiplexers after the carry-in from previous order additions obtained. The modified CSLA replaces the RCA block with carry-in one by a Binary to Excess One Converter(BEC). This paper proposes an efficient adder which is a modified CSLA without multiplexer, were we replace the multiplexer and BEC with a combination circuit consisting of XOR and AND gates.

Other Details:

Manuscript Id	:	IJSTEV2I10149
Published in	:	Volume : 2, Issue : 10
Publication Date	:	01/05/2016
Page(s)	:	573-577

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